Integrated circuits (IC's) typically include a large number of components, particularly transistors. One type of transistor is a metal-oxide-semiconductor field-effect-transistor (MOSFET). MOSFET devices typically include a gate structure on top of a semiconductor substrate. Both sides of the gate structure are doped to form source and drain regions. A channel is formed between the source and drain regions beneath the gate. Based on a voltage bias applied to the gate, electric current may either be allowed to flow through the channel or be inhibited from doing so.
In some cases, the channel may be formed as a fin-like structure (herein “fin”). Such a fin protrudes beyond a top surface of the substrate and runs perpendicular to the gate structure formed on the substrate and the fin. In general, a field-effect-transistor using such a fin as a channel is referred to as a fin field-effect-transistor (“FinFET”). The FinFET further includes source/drain features epitaxially grown from respective side portions of the fin channel. Such a source/drain feature is typically grown to symmetrically extend beyond an original geometric dimension of the fin channel.
As mentioned above, an IC typically includes plural transistors, e.g., FinFET's, formed on a same substrate, or a chip. In accordance with evolution of the technology nodes, the number of FinFET's disposed on a single chip also increases rapidly. As such, the conventional FinFET's source/drain feature with the “symmetrically extended” profile may encounter various issues such as, for example, an undesirable, or intolerable, parasitic capacitance value induced by two neighboring symmetrically extended source/drain features (i.e., two neighboring FinFET's) when the two neighboring FinFET's are disposed substantially close to each other, which becomes more common in advanced technology nodes.